Duty-Cycling Buildings Aggressively: The Next Frontier in HVAC Control
Reducing the Flow Completion Time Tail in Datacenter Networks [ edit ]
Per-Process Energy Accounting
JETC: Joint Energy Thermal and Cooling Management for Memory and CPU Subsystems in Servers
Performance Analysis of Synchronous Models Implementations on Loosely Time-Triggered Architectures [ edit ]
Themis: Energy Management in Virtualized Environments [ edit ]
Distributed Thermal Management in Heterogeneous System
Managing Distributed UPS Energy for Effective Power Capping in Data Centers [ edit ]
5nW crystal oscillator for ultra-low power [ edit ]
Practical Infinite Ontologies for Static Model Analysis
A Transparent μECOG Array for Bidirectional Brain-Machine Interfaces [ edit ]
Platform-based Architecture Exploration for Heterogeneous System in Multiple Modeling Environments [ edit ]
Temporal Logic Planning [ edit ]
Fast Crash Recovery in RAMCloud [ edit ]
Dynamic Deferral of Workload for Capacity Provisioning in Data Centers [ edit ]
QoS-based Dynamic Allocation in Embedded Systems: a Methodology and a Framework
Expected-Utility-Based Sensor Selection For State Estimation
Resiliency-Aware Scheduling and Co-Design
miniTP: a Protocol for the Minimization of the Transmit Power in Wireless Networks
Control Protocol Synthesis of an Electric Power System
Integrated SysML-Modelica Modeling Framework and Trade-off Analysis for VMS [ edit ]
Themis: A Platform for Balanced Data-Intensive Scalable Computing [ edit ]
Behavioral and Parametric Modeling of Boeing 767 Electrical Power System using SysML [ edit ]
Trust-based performance improvement in social collaborative filtering and distributed decisions
Model-Based Design Framework for Wireless Sensor Networks Using SysML, Simulink and Modelica
Receding Horizon Control Subject to Energy Hierarchical Constraints
Efficient Network Topologies and Protocols for Communication Networks in Collaborative Control [ edit ]
Closed-Loop Decoder Adaptation (CLDA) Algorithms for Brain-Machine Interfaces [ edit ]
Development of Building Automation and Control (BAC) Systems
Physical Layer Security
TAP: Token-Based Adaptive Power Gating [ edit ]
Towards an Ultra Low-Energy Computation with Asynchronous Circuits
A Case Study: Energy-scalable Detection on the MSP430 [ edit ]
Fabrication of True 3D Integrated Antenna
An Introspective Framework for Soft Error Resilience [ edit ]
Soft errors in memory or logic are an increasingly common occurrence. Traditional hardware techniques focus on error correction to offer programmers the illusion of an error-free execution environment. Hardware pairing and triple-modular redundancy (TMR) can be used to detect and correct soft errors in logic, but are wasteful in terms of space and power. At the memory level, parity and SEC/DED (Single Error Correction Double Error Detection) codes can be used to correct them. Yet, multi-bit errors today are not corrected and are likely to result in catastrophic system failure. As error rates increase, techniques such as check-pointing will become less effective, as dwindling MTBF shortens the check-pointing interval.
In this work, we explore a software approach for tolerating multi-bit errors in memory by combining user-provided knowledge with system introspection. An introspective runtime framework observes the address space to determine the contextual significance of the corrupted data and examines trends of the execution and hardware resources used to transparently reassign resources so as to avoid execution and memory resources that consistently exhibit failures. At the application level, rather than enduring system failure, we offer the programmer an application-level interface to specify where, and which errors can be tolerated. Programmers also specify what corrective actions, if any, to undertake in the case of the unrecoverable data failure. We also leverage compiler- based program analysis coupled with user directives to reduce the overhead of the implementation of the remedies, such as reducing the volume of data saved/restored with check-pointing.
Ultimately, with the synergistic combination of programmer knowledge and compiler and runtime introspection we aim to substantially increase the dependability of the applications that will be running on large scale computing platforms by the end of this decade.
Energy Efficiency for Large-Scale MapReduceWorkloads with Significant Interactive Analysis [ edit ]
A Modular 1mm^3 Die-Stacked Sensing Platform [ edit ]
OS-level power minimization under tight performance constraints in general purpose systems
Low-Power Scalable Platform for Electrocorticography [ edit ]
Checking for Circular Dependencies in Distributed Stream Programs
Managing Plug-Loads for Demand Response within Buildings
Demand Response is the ability of a building to to reduce loads due to requests from the grid or extremely high prices. Current technologies only target HVAC and lighting for the reductions in energy demands. We have developed the technology to enable energy reduction on commodity plug loads. Furthermore, we use the occupancy and device type information to enable the best possible policy for the building managers to implement.
Our Synergy Energy Meter measures plug load device power consumption and uses ZigBee for data transmission. It also has the ability to actuate, store device priority and device type. Our Energy Auditor Server uses the accumulated information and provides the appropriate mechanisms for the building managers to implement the most optimal policies.
Connectivity Brokerage: Enabling Seamless Cooperation in Wireless Networks