Citation
Lihang Zhao, Jeff Draper, Woojin Choi. "TMNOC: A Case of HTM and NoC Co-design for Increased Energy Efficiency and Concurrency". Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT2012), September, 2012.

Abstract
Hardware Transactional Memory (HTM) designs must implement conflict detection mechanism to guarantee the correctness of transaction execution. As eager HTMs keep speculative data in the memory hierarchy, the conflict detection mechanism usually works at a cacheline level that fits naturally into the cache coherence protocol. Thus, the inter-transaction communication for conflict detection is usually mapped onto the coherence communication controlled by the directory-based coherence protocols. In this paper, we identify inefficiency introduced by such mappings. The net effect of such inefficiency is excessive on-chip network traffic that consumes substantial dynamic power as packets are switched over the routers and links. We present TMNOC, a HTM and Network-on-Chip (NoC) co-design to improve network energy efficiency. The on-chip network, instead of a passive communication substrate, proactively filters out transactional requests that waste energy yet having no contribution to the progress of transactions. Experiment results show that TMNOC reduces energy consumption of the on-chip network by 14.5% on average (up to 38%) across a wide range of transaction applications.

Electronic downloads
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Citation formats

• HTML

  Lihang Zhao, Jeff Draper, Woojin Choi. <a
  href="http://www.musyc.org/pubs/407.html">TMNOC:
  A Case of HTM and NoC Co-design for Increased Energy
  Efficiency and Concurrency</a>, Proceedings of the
  International Conference on Parallel Architectures and
  Compilation Techniques (PACT2012), September, 2012.

• Plain text

  Lihang Zhao, Jeff Draper, Woojin Choi. "TMNOC: A Case of HTM
  and NoC Co-design for Increased Energy Efficiency and
  Concurrency". Proceedings of the International Conference on
  Parallel Architectures and Compilation Techniques
  (PACT2012), September, 2012.

• BibTeX

  @inproceedings{ZhaoDraperChoi12_TMNOCCaseOfHTMNoCCodesignForIncreasedEnergyEfficiency,
      author = {Lihang Zhao and Jeff Draper and Woojin Choi},
      title = {TMNOC: A Case of HTM and NoC Co-design for
                Increased Energy Efficiency and Concurrency},
      booktitle = {Proceedings of the International Conference on
                Parallel Architectures and Compilation Techniques
                (PACT2012)},
      month = {September},
      year = {2012},
      abstract = {Hardware Transactional Memory (HTM) designs must
                implement conflict detection mechanism to
                guarantee the correctness of transaction
                execution. As eager HTMs keep speculative data in
                the memory hierarchy, the conflict detection
                mechanism usually works at a cacheline level that
                fits naturally into the cache coherence protocol.
                Thus, the inter-transaction communication for
                conflict detection is usually mapped onto the
                coherence communication controlled by the
                directory-based coherence protocols. In this
                paper, we identify inefficiency introduced by such
                mappings. The net effect of such inefficiency is
                excessive on-chip network traffic that consumes
                substantial dynamic power as packets are switched
                over the routers and links. We present TMNOC, a
                HTM and Network-on-Chip (NoC) co-design to improve
                network energy efficiency. The on-chip network,
                instead of a passive communication substrate,
                proactively filters out transactional requests
                that waste energy yet having no contribution to
                the progress of transactions. Experiment results
                show that TMNOC reduces energy consumption of the
                on-chip network by 14.5% on average (up to 38%)
                across a wide range of transaction applications.},
      URL = {http://www.musyc.org/pubs/407.html}
  }
  

Posted by Jeff Draper on 7 Aug 2012..

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